The manufacturing of integrated circuits (ICs) requires many process steps which are executed with precision and accuracy. Precision is important in that the ultimate dimensions of the components of integrated circuits are becoming smaller and smaller, on the order of less than one micron. Accuracy is important so that the related process steps are repeatable over time and produce results within a controlled range.
A significant part of many wafer manufacturing processes includes photolithography. Photolithography involves making an image of a part of the electronic circuit, rendering this part of the circuit onto a photographic plate, sometimes referred to as a photomask; and using the photomask and a light source to print that image onto a silicon wafer upon which a light-sensitive emulsion, or a photoresist, has been applied. The exposed photoresist is developed to reveal the desired circuit elements.
Other processes and treatments complete the layer for a given part of the electronic circuit. A given electronic circuit may have a number of photolithographic steps. The number of photolithographic steps often increases as circuits become more and more complex.
Two devices used for printing a mask pattern onto a silicon wafer are the projection aligner and the stepper.
FIG. 1a shows an example of a projection aligner's view of the alignment structure. In projection aligner printing, typically all of the product die on the wafer are printed simultaneously. For example, if a wafer substrate has the capacity to hold 150 die, the mask will have 150 images on it. In one typical projection aligner system, for example, the optical system includes two reflecting surfaces. The light, typically, supplied by a high energy source (e.g., a mercury lamp), passes through a point on the photomask to a primary mirror. The light bounces off the primary mirror onto a secondary mirror. From the secondary mirror, it again bounces back to the primary mirror. Here the image on the photomask is projected onto the wafer substrate. To assure accurate alignment, the device relies upon receiving a reflected light signature of the wafer substrate's alignment target so that it can be aligned with the photomask's corresponding marks.
One or more of these alignment structures are placed about a silicon wafer substrate to aid in aligning the plurality of photolithography steps used in a typical sub-micron process to manufacture a semiconductor device. Subsequent layers' photomasks have alignment structures on them which correspond to those structures printed previously on the silicon wafer substrate. Consequently, inter-layer alignment is maintained throughout the building of the semiconductor device.
FIG. 1b shows an application of an example embodiment in a photolithography process which uses steppers. In using steppers, one pattern of a layer of the semiconductor device is placed on a reticle. The image on the reticle may be about 5 times larger than the final printed image on the wafer. The stepper optics reduce the size of the reticle image to the final device size. As a wafer is printed, the stepper aligns to the previously printed die. The wafer steps along and the aligner prints one die at a time. Each die has at least one of the alignment structures to assure alignment throughout the building of the semiconductor device.
Each step builds an additional layer of the circuit upon the previously built ones. To assure that the layers line up with one another, the subsequent layers are printed relative to the first.
Alignment structures are sometimes included with the electronic circuit as part of its set of photomasks. These structures enable the alignment apparatus to reference correctly the current mask's image with the previously printed patterns on the wafer substrate. Typically, the alignment apparatus measures the reflected light off the surface topography of the alignment structure of the wafer. This reflected light "signature" enables the instrument to properly reference the subsequent photomask's alignment structure to the alignment structures on the wafer, thereby permitting proper connections between the circuits.
Conventional alignment methods rely upon topographical changes in the photoresist layer and the underlying device layers for detection of the alignment structures and accurate determination of the position of those structures. Often, the alignment structures are depressions or trenches made in one or more layers on the wafer. Photoresist is conformally deposited over the wafer and therefore matches the topography of the underlying layers. This typically results in a sloped topography around the perimeter of the depressions. Light from an alignment apparatus is typically directed normal to the flat surface of the wafer. This light is reflected back to the alignment apparatus, where the reflected light is detected. However, when light from the alignment apparatus is directed at the sloped regions it is incident at an angle less than 90.degree. due to the sloped surface and therefore is not reflected directly back to the alignment apparatus. Thus, the edges of the depression are marked by a decrease in reflected light at the detector of the alignment apparatus.
Modem processing techniques, however, typically planarize the surfaces of some or all of the layers as they are deposited. Planarization of the layers is often achieved by chemical or mechanical methods. A common method of planarization is chemical-mechanical polishing (CMP). When the preceding layers are planarized, a photoresist applied over the layers has a relatively planar topography. This makes the alignment process more difficult because there is no photoresist or device topography which alters the angle of incidence of the incoming light and causes a change in the amount of light reflected back to the detector.